we generally see this kind of pins in PCs..nowadays, USB has replaced everything so in laptops we dont find UART pins although some old laptops might have these...
In synchronous communication the frame consists of data bits while in asynchronous communication the total number of bits in a frame may be more than the data bits.
There are three ways in which serial communication can be done
i. Simplex: Transmission is done in one direction.
ii. Half duplex: Transmission can be done in both the direction but one side at a time.
iii. Full duplex: Transmission can be done in both the direction simultaneously.
Atmega16 is equipped with three different kinds of serial communication peripheral systems:
i. Serial USART
ii. SPI (Serial Peripheral Interface)
iii. TWI (Two wire Interface)
SERIAL USART (universal synchronous asynchronous receiver and transmission/ transmitter):
Serial USART provides full-duplex communication between the transmitter and receiver. Atmega16 is equipped with independent hardware for serial USART communication. Pin-14 (RXD) and Pin-15 (TXD) provide receive and transmit interface to the microcontroller.
Atmega16 USART provides asynchronous mode of communication and do not have a dedicated clock line between the transmitting and receiving end. The synchronization is achieved by properly setting the baud rate, start and stop bits in a transmission sequence.
Start bit and stop bit: These bits are use to synchronize the data frame. Start bit is one single low bit and is always given at the starting of the frame, indicating the next bits are data bits. Stop bit can be one or two high bits at the end of frame, indicating the completion of frame.
Baud Rate: In simple words baud rate is the rate at which serial data is being transferred.
Atmega16 USART has following features:
· Different Baud Rates.
· Variable data size with options ranging from 5bits to 9bits.
· One or two stop bits.
· Hardware generated parity check.
· USART can be configured to operate in synchronous mode.
· Three separate interrupts for RX Complete, TX complete and TX data register empty.
USART Registers
To use the USART of Atmega16, certain registers need to be configured.
UCSR: USART control and status register. It’s is basically divided into three parts UCSRA, UCSRB and UCSRC. These registers are basically used to configure the USART.
UBRR: USART Baud Rate Registers. Basically use to set the baud rate of USART
UDR: USART data register
i. UCSRA: (USART Control and Status Register A)
RXC (USART Receive Complete): RXC flag is set to 1 if unread data exists in receive buffer, and set to 0 if receive buffer is empty.
TXC (USART Transmit complete): TXC flag is set to 1 when data is completely transmitted to Transmit shift register and no data is present in the buffer register UDR.
UDRE (USART Data Register Empty): This flag is set to logic 1 when the transmit buffer is empty, indicating it is ready to receive new data. UDRE bit is cleared by writing to the UDR register.
ii. UCSRB: (USART Control and Status Register B)
RXCIE: RX Complete Interrupt Enable,
When 1 -> RX complete interrupt is enabled.
When 0 -> RX complete interrupt is disabled.
TXCIE: TX Complete Interrupt Enable,
When 1 -> TX complete interrupt is enabled
When 0-> TX complete interrupt is disabled
UDRIE: USART Data Register Empty Interrupt Enable,
UDRIE: USART Data Register Empty Interrupt Enable,
When 1 -> UDRE flag interrupt is enabled.
When 0 -> UDRE flag interrupt is disabled.
RXEN: Receiver Enabled,
RXEN: Receiver Enabled,
When 1 -> USART Receiver is enabled.
When 0 -> USART Receiver is disabled.
TXEN: Transmitter Enabled,
When 1 -> USART Transmitter is enabled.
When 0 -> USART Transmitter is disabled.
iii. UCSRC: (USART Control and Status Register C)
The transmitter and receiver are configured with the same data features as configured in this register for proper data transmission.
URSEL: USART Register select. This bit must be set due to sharing of I/O location by UBRRH and UCSRC
UMSEL: USART Mode Select,
UMSEL: USART Mode Select,
When 1 -> Synchronous Operation
When 0 -> Asynchronous Operation
UPM[0:1]: USART Parity Mode, Parity mode selection bits.
USBS: USART Stop Select Bit,
When 0-> 1 Stop Bit
When 1 -> 2 Stop Bits
UCSZ[0:1]: The UCSZ[1:0] bits combined with the UCSZ2 bit in UCSRB sets size of data frame i.e., the number of data bits. The table shows the bit combinations with respective character size.
UCSZ2 | UCSZ1 | UCSZ0 | Character Size |
0 | 0 | 0 | 5-bit |
0 | 0 | 1 | 6-bit |
0 | 1 | 0 | 7-bit |
0 | 1 | 1 | 8-bit |
1 | 0 | 0 | Reserved |
1 | 0 | 1 | Reserved |
1 | 1 | 0 | Reserved |
1 | 1 | 1 | 9-bit |
iv. UDR: (USART Data Register)
The USART Data receive and data transmit buffer registers share the same address referred as USART UDR register, when data is written to the register it is written in transmit data buffer register (TXB). Received data is read from the Receive data buffer register (RXB). v. UBRRH & UBRRL (USART Baud Rate Registers)
The UBRRH register shares the same I/O address with the UCSRC register, The differentiation is done on the basis of value of URSEL bit.
When URSEL=0; write operation is done on UBRRH register.
When URSEL=1; write operation is done on UCSRC register.
The UBRRH and UBRRL register together stores the 12-bit value of baud rate, UBRRH contains the 4 most significant bits and UBRRL contains the other 8 least significant bits. Baud rates of the transmitting and receiving bodies must match for successful communication to take place.
